731 search results - page 79 / 147 » Interconnect modeling for improved system-level design optim... |
DAC
2005
ACM
14 years 10 months ago
2005
ACM
Device optimization considering supply voltage Vdd and threshold voltage Vt tuning does not increase chip area but has a great impact on power and performance in the nanometer tec...
ISCAS
2002
IEEE
14 years 1 months ago
2002
IEEE
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
LCTRTS
2005
Springer
14 years 2 months ago
2005
Springer
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
CVPR
2012
IEEE
11 years 11 months ago
2012
IEEE
We present a machine learning framework that automatically generates a model set of landmarks for some class of registered 3D objects: here we use human faces. The aim is to repla...
PR
2006
13 years 8 months ago
2006
A cross-validation error estimator is obtained by repeatedly leaving out some data points, deriving classifiers on the remaining points, computing errors for these classifiers on ...