731 search results - page 87 / 147 » Interconnect modeling for improved system-level design optim... |
DAC
2003
ACM
14 years 2 months ago
2003
ACM
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
ICCAD
2008
IEEE
14 years 5 months ago
2008
IEEE
Abstract— As VLSI technology enters the nanoscale regime, interconnect delay becomes the bottleneck of circuit performance. Compared to gate delays, wires are becoming increasing...
QRE
2008
13 years 8 months ago
2008
: Kriging-based exploration strategies often rely on a single Ordinary Kriging model which parametric covariance kernel is selected a priori or on the basis of an initial data set....
WSC
2004
13 years 10 months ago
2004
Nowadays, in a hotly competitive environment, companies are continuously trying to provide products and/or services to customers faster, cheaper, and better than the competitors d...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
Behavior synthesis and optimization beyond the register transfer level require an efficient utilization of the underlying platform features. This paper presents a platform-based ...