We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
Abstract— As VLSI technology enters the nanoscale regime, interconnect delay becomes the bottleneck of circuit performance. Compared to gate delays, wires are becoming increasing...
: Kriging-based exploration strategies often rely on a single Ordinary Kriging model which parametric covariance kernel is selected a priori or on the basis of an initial data set....
Nowadays, in a hotly competitive environment, companies are continuously trying to provide products and/or services to customers faster, cheaper, and better than the competitors d...
Behavior synthesis and optimization beyond the register transfer level require an efficient utilization of the underlying platform features. This paper presents a platform-based ...