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» Interconnect opportunities for gigascale integration
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ASPDAC
2011
ACM
297views Hardware» more  ASPDAC 2011»
12 years 11 months ago
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequent...
Shashikanth Bobba, Ashutosh Chakraborty, Olivier T...
CAMP
2005
IEEE
14 years 1 months ago
Real-Time Low Level Feature Extraction for On-Board Robot Vision Systems
Abstract— Robot vision systems notoriously require large computing capabilities, rarely available on physical devices. Robots have limited embedded hardware, and almost all senso...
Roberto Pirrone, Giuseppe Careri, F. Saverio Fabia...
NOCS
2009
IEEE
14 years 2 months ago
Networks-on-chip in emerging interconnect paradigms: Advantages and challenges
Communication plays a crucial role in the design and performance of multi-core systems-on-chip (SoCs). Networks-on-chip (NoCs) have been proposed as a promising solution to simpli...
Luca P. Carloni, Partha Pande, Yuan Xie
DATE
2008
IEEE
129views Hardware» more  DATE 2008»
14 years 1 months ago
Memory Technology for Extended Large-Scale Integration in Future Electronics Applications
Extending 2-D planar topologies in integrated circuits (ICs) to a 3-D implementation has the obvious benefits of reducing the overall footprint and average interconnection length,...
Dinesh Pamunuwa
ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
14 years 1 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...