As CMOS technology scales deeper into the nanometer regime, factors such as leakage power and chip temperature emerge as critically important concerns for high-performance VLSI des...
In this paper, we present an experimental integrated platform for the research, development and evaluation of new VLSI back-end algorithms and design flows. Interconnect scaling ...
In this paper, we propose an analytic approach of modeling a closed-loop network with multiple feedback loops using fluid-flow approximation. Specifically, we model building bl...
In deep submicron VLSI circuits, interconnect reliability due to electromigration and thermal effects is fast becoming a serious design issue particularly for long signal lines. T...
The size of supercomputers in numbers of processors is growing exponentially. Today’s largest supercomputers have upwards of a hundred thousand processors and tomorrow’s may ha...
Mustafa M. Tikir, Michael Laurenzano, Laura Carrin...