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CODES
2005
IEEE
14 years 2 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
CVPR
2005
IEEE
14 years 2 months ago
A Measure of Deformability of Shapes, with Applications to Human Motion Analysis
In this paper we develop a theory for characterizing how deformable a shape is. We define a term called “deformability index” for shapes. The deformability index is computed ...
Amit K. Roy Chowdhury
IPPS
2005
IEEE
14 years 2 months ago
Fault-Tolerant Parallel Applications with Dynamic Parallel Schedules
Commodity computer clusters are often composed of hundreds of computing nodes. These generally off-the-shelf systems are not designed for high reliability. Node failures therefore...
Sebastian Gerlach, Roger D. Hersch
LCN
2005
IEEE
14 years 2 months ago
Implementation and Performance Analysis of a Packet Scheduler on a Programmable Network Processor
— The problem of achieving fairness in the allocation of the bandwidth resource on a link shared by multiple flows of traffic has been extensively researched over the last deca...
Fariza Sabrina, Salil S. Kanhere, Sanjay Jha
QSHINE
2005
IEEE
14 years 2 months ago
Retransmission Strategies for Wireless Connections with Resource-Limited Devices
Protocols designed to provide error-free communications over lossy links, at both data link and transport layers, commonly employ the idea of sliding windows, which is based on th...
Lavy Libman