Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the mos...
Abstract. In the eld of reactive system programming, data ow synchronous languages like Lustre BCH+85,CHPP87 or Signal GBBG85 o er a syntax similar to block-diagrams, and can be e ...
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
FPGA chips in reconfigurable computer systems are used as malleable coprocessors where components of a hardware library of functions can be configured as needed. As the number of ...
Motivatedby the analysis of known parallel techniques for the solution of linear tridiagonal system, we introduce generalized scans, a class of recursively de ned lengthpreserving...
Paul F. Fischer, Franco P. Preparata, John E. Sava...