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» Introspective 3D chips
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EH
2003
IEEE
84views Hardware» more  EH 2003»
14 years 26 days ago
Evolved Reversible Cascades Realized on the CAM-Brain Machine
This paper presents a new approach to reversible cascade evolution based on a 3D cellular automaton. As a research platform we used the ATR’s CAMBrain Machine (CBM). Reversible ...
Andrzej Buller, Marek A. Perkowski
ICCD
2008
IEEE
120views Hardware» more  ICCD 2008»
14 years 4 months ago
Near-optimal oblivious routing on three-dimensional mesh networks
— The increasing viability of three dimensional (3D) silicon integration technology has opened new opportunities for chip architecture innovations. One direction is in the extens...
Rohit Sunkam Ramanujam, Bill Lin
ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
14 years 2 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
DATE
2006
IEEE
120views Hardware» more  DATE 2006»
14 years 1 months ago
Design and test of fixed-point multimedia co-processor for mobile applications
: In this research, a fixed-point multimedia co-processor is designed and tested into an ARM-10 based mobile graphics processor for portable 2-D and 3-D multimedia applications. Th...
Ju-Ho Sohn, Jeong-Ho Woo, Jerald Yoo, Hoi-Jun Yoo
ISCA
2000
IEEE
121views Hardware» more  ISCA 2000»
13 years 12 months ago
Memory access scheduling
The bandwidth and latency of a memory system are strongly dependent on the manner in which accesses interact with the “3-D” structure of banks, rows, and columns characteristi...
Scott Rixner, William J. Dally, Ujval J. Kapasi, P...