251 search results - page 49 / 51 » Lattice-Valued Binary Decision Diagrams |
ICCAD
1999
IEEE
13 years 11 months ago
1999
IEEE
Constraining and input biasing are frequently used techniques in functional verification methodologies based on randomized simulation generation. Constraints confine the simulatio...
HASE
1998
IEEE
13 years 11 months ago
1998
IEEE
Fault trees provide a graphical and logical framework for analyzing the reliability of systems. A fault tree provides a conceptually simple modeling framework to represent the sys...
ICCAD
1996
IEEE
13 years 11 months ago
1996
IEEE
This paper presents a new framework for formal logic verification. What is depicted here is fundamentally different from previous approaches. In earlier approaches, the circuit is ...
DFG
2004
Springer
13 years 11 months ago
2004
Springer
This paper presents the real-time model checker RAVEN and related theoretical background. RAVEN augments the efficiency of traditional symbolic model checking with possibilities to...
SCS
2003
13 years 8 months ago
2003
The decomposition of complex systems into manageable parts is an essential principle when dealing with complex technical systems. However, many safety and reliability modelling te...