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» Layout synthesis for datapath designs
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ASPDAC
2007
ACM
124views Hardware» more  ASPDAC 2007»
14 years 17 days ago
Improving XOR-Dominated Circuits by Exploiting Dependencies between Operands
Logic synthesis has made impressive progress in the last decade and has pervaded digital design replacing almost universally manual techniques. A remarkable exception is computer ...
Ajay K. Verma, Paolo Ienne
DATE
2007
IEEE
109views Hardware» more  DATE 2007»
14 years 2 months ago
Area optimization of multi-cycle operators in high-level synthesis
Conventional high-level synthesis algorithms usually employ multi-cycle operators to reduce the cycle length in order to improve the circuit performance. These operators need seve...
María C. Molina, Rafael Ruiz-Sautua, Jose M...
FCCM
2000
IEEE
144views VLSI» more  FCCM 2000»
14 years 1 months ago
Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines
Mapping computations written in high-level programming languages to FPGA-based computing engines requires programmers to generate the datapath responsible for the core of the comp...
Pedro C. Diniz, Joonseok Park
IPPS
2007
IEEE
14 years 2 months ago
Rethinking Automated Synthesis of MPSoC Architectures
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...
Brett H. Meyer, Donald E. Thomas
DAC
2000
ACM
14 years 9 months ago
Practical iterated fill synthesis for CMP uniformity
We propose practical iterated methods for layout density control for CMP uniformity, based on linear programming, Monte-Carlo and greedy algorithms. We experimentally study the tr...
Yu Chen, Andrew B. Kahng, Gabriel Robins, Alexande...