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» Leakage power modeling and reduction with data retention
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ISCAS
2007
IEEE
167views Hardware» more  ISCAS 2007»
14 years 2 months ago
An Adaptive Sleep Transistor Biasing Scheme for Low Leakage SRAM
— Reducing the leakage power in embedded SRAM memories is critical for low-power applications. Raising the source voltage of SRAM cells in standby mode reduces the leakage curren...
Afshin Nourivand, Chunyan Wang, M. Omair Ahmad
IPPS
2007
IEEE
14 years 2 months ago
Leakage Energy Reduction in Value Predictors through Static Decay
As process technology advances toward deep submicron (below 90nm), static power becomes a new challenge to address for energy-efficient high performance processors, especially for...
Juan M. Cebrian, Juan L. Aragón, José...
ISLPED
2005
ACM
111views Hardware» more  ISLPED 2005»
14 years 2 months ago
Peak temperature control and leakage reduction during binding in high level synthesis
Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness o...
Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...
ICCAD
2006
IEEE
107views Hardware» more  ICCAD 2006»
14 years 5 months ago
Decoupling capacitor planning and sizing for noise and leakage reduction
—Decoupling capacitors (decaps) are a popular means for reducing power-supply noise in integrated circuits. Since the decaps are usually inserted in the whitespace of the device ...
Eric Wong, Jacob R. Minz, Sung Kyu Lim
CHES
2004
Springer
230views Cryptology» more  CHES 2004»
14 years 2 months ago
Correlation Power Analysis with a Leakage Model
Abstract. A classical model is used for the power consumption of cryptographic devices. It is based on the Hamming distance of the data handled with regard to an unknown but consta...
Eric Brier, Christophe Clavier, Francis Olivier