373 search results - page 35 / 75 » Learning Arithmetic Circuits |
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
Switching model captures the data-driven uncertainty in logic circuits in a comprehensive probabilistic framework. Switching is a critical factor that influences dynamic, active ...
ATS
2003
IEEE
14 years 27 days ago
2003
IEEE
We present a framework for high-level design validation using an efficient register-transfer level (RTL) automatic test pattern generator (ATPG). The RTL ATPG generates the test ...
ISMVL
2003
IEEE
14 years 27 days ago
2003
IEEE
A new multiple-valued current-mode (MVCM) integrated circuit based on dynamic source-coupled logic (SCL) is proposed for low-power VLSI applications. The use of a precharge-evalua...
EUROGP
2000
Springer
13 years 11 months ago
2000
Springer
1 The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in rst time. The new representation of logic...
CDES
2008
13 years 9 months ago
2008
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...