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FPGA
1999
ACM
174views FPGA» more  FPGA 1999»
14 years 2 months ago
Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
Peter Kollig, Bashir M. Al-Hashimi
VISUALIZATION
1999
IEEE
14 years 2 months ago
Multi-Projector Displays Using Camera-Based Registration
Conventional projector-based display systems are typically designed around precise and regular configurations of projectors and display surfaces. While this results in rendering s...
Ramesh Raskar, Michael S. Brown, Ruigang Yang, Wei...
HIPC
1999
Springer
14 years 2 months ago
Microcaches
We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...
David May, Dan Page, James Irwin, Henk L. Muller
ATS
1998
IEEE
170views Hardware» more  ATS 1998»
14 years 2 months ago
A Ring Architecture Strategy for BIST Test Pattern Generation
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...
Christophe Fagot, Olivier Gascuel, Patrick Girard,...
CGI
1998
IEEE
14 years 2 months ago
Fast Approximate Quantitative Visibility for Complex Scenes
Ray tracing and Monte-Carlo based global illumination, as well as radiosity and other finite-element based global illumination methods, all require repeated evaluation of quantita...
Yiorgos Chrysanthou, Daniel Cohen-Or, Dani Lischin...
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