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CODES
2007
IEEE
14 years 4 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
LICS
2006
IEEE
14 years 4 months ago
Provable Implementations of Security Protocols
for reasoning about abstract models of protocols. The work on informal methods attempts to discern common patterns in the extensive record of flawed protocols, and to formulate po...
Andrew D. Gordon
MICRO
2006
IEEE
135views Hardware» more  MICRO 2006»
14 years 4 months ago
Support for High-Frequency Streaming in CMPs
As the industry moves toward larger-scale chip multiprocessors, the need to parallelize applications grows. High inter-thread communication delays, exacerbated by over-stressed hi...
Ram Rangan, Neil Vachharajani, Adam Stoler, Guilhe...
AOSD
2006
ACM
14 years 4 months ago
Using aspects to support the software process: XP over Eclipse
Usually, aspects enhance a software product by being composed - or woven - into it. Here, on the other hand, we use aspects to support the software development process itself. The...
Oren Mishali, Shmuel Katz
CODES
2005
IEEE
14 years 3 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...