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VLSID
2004
IEEE
117views VLSI» more  VLSID 2004»
14 years 10 months ago
Evaluating the Reliability of Defect-Tolerant Architectures for Nanotechnology with Probabilistic Model Checking
As we move from deep submicron technology to nanotechnology for device manufacture, the need for defect-tolerant architectures is gaining importance. This is because, at the nanos...
Gethin Norman, David Parker, Marta Z. Kwiatkowska,...
LICS
2009
IEEE
14 years 4 months ago
Indexed Containers
The search for an expressive calculus of datatypes in which canonical algorithms can be easily written and proven correct has proved to be an enduring challenge to the theoretical ...
Thorsten Altenkirch, Peter Morris
IFIP
2009
Springer
14 years 4 months ago
On Designing for Tussle: Future Internet in Retrospect
Abstract. Over the past decades, the fundamental principles of the Internet architecture have not significantly changed. However, Internet evolution and its effects on participants...
Costas Kalogiros, Alexandros Kostopoulos, Alan For...
IUCS
2009
ACM
14 years 4 months ago
Utilizing semantic equivalence classes of Japanese functional expressions in machine translation
This paper applied “Sandglass” machine translation architecture to the task of translating Japanese functional expressions into English. We employ the semantic equivalence cla...
Akiko Sakamoto, Takehito Utsuro, Suguru Matsuyoshi
DATE
2008
IEEE
204views Hardware» more  DATE 2008»
14 years 4 months ago
Deep Submicron Interconnect Timing Model with Quadratic Random Variable Analysis
Shrinking feature sizes and process variations are of increasing concern in modern technology. It is urgent that we develop statistical interconnect timing models which are harmon...
Jun-Kuei Zeng, Chung-Ping Chen