915 search results - page 69 / 183 » Level Shifter Design for Low Power Applications |
113
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MAM
2006
15 years 4 months ago
2006
The increasingly constrained power budget of today's microprocessor has resulted in a situation where power savings of all components in a system have to be taken into consid...
128
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VLSID
2002
IEEE
16 years 4 months ago
2002
IEEE
Predictive delay analysis is presented for a representative CMOS inverter with submicron device size using PREDICTMOS MOSFET model. As against SPICE, which adopts a time consuming...
135
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DATE
2003
IEEE
15 years 9 months ago
2003
IEEE
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
126
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ASAP
2008
IEEE
15 years 10 months ago
2008
IEEE
NTRU is a public-key cryptosystem based on the shortest vector problem in a lattice which is an alternative to RSA and ECC. This work presents a compact and low power NTRU design ...
116
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DATE
2009
IEEE
15 years 11 months ago
2009
IEEE
This paper presents a design methodology for fully reconfigurable low-voltage Delta-Sigma converters as for instance used in next-generation wireless applications. The design metho...