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» Linear-Time Algorithms in Memory Hierarchies
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MICRO
2000
IEEE
121views Hardware» more  MICRO 2000»
13 years 11 months ago
Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures
Conventional microarchitectures choose a single memory hierarchy design point targeted at the average application. In this paper, we propose a cache and TLB layout and design that...
Rajeev Balasubramonian, David H. Albonesi, Alper B...
DAC
2006
ACM
14 years 8 months ago
Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies
The increasing use of Multiprocessor Systems-on-Chip (MPSoCs) for high performance demands of embedded applications results in high power dissipation. The memory subsystem is a la...
Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil...
DEBU
2010
128views more  DEBU 2010»
13 years 4 months ago
Designing Database Operators for Flash-enabled Memory Hierarchies
Flash memory affects not only storage options but also query processing. In this paper, we analyze the use of flash memory for database query processing, including algorithms that...
Goetz Graefe, Stavros Harizopoulos, Harumi A. Kuno...
SAC
2004
ACM
14 years 25 days ago
Caching in Web memory hierarchies
Web cache replacement algorithms have received a lot of attention during the past years. Though none of the proposed algorithms deals efficiently with all the particularities of t...
Dimitrios Katsaros, Yannis Manolopoulos
PODS
2002
ACM
138views Database» more  PODS 2002»
14 years 7 months ago
Fast Algorithms For Hierarchical Range Histogram Construction
Data Warehousing and OLAPapplications typically view data as having multiple logical dimensions e.g., product, location with natural hierarchies de ned on each dimension. OLAP que...
Sudipto Guha, Nick Koudas, Divesh Srivastava