Sciweavers

320 search results - page 35 / 64
» Linking codesign and reuse in embedded systems design
Sort
View
CODES
2007
IEEE
14 years 2 months ago
Complex task activation schemes in system level performance analysis
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...
Wolfgang Haid, Lothar Thiele
CODES
2002
IEEE
14 years 21 days ago
Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
Juanjo Noguera, Rosa M. Badia
RTAS
2008
IEEE
14 years 2 months ago
Incorporating Resource Safety Verification to Executable Model-based Development for Embedded Systems
This paper formulates and illustrates the integration of resource safety verification into a design methodology for development of verified and robust real-time embedded systems. ...
Jianliang Yi, Honguk Woo, James C. Browne, Aloysiu...
GLVLSI
2006
IEEE
126views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Hardware/software partitioning of operating systems: a behavioral synthesis approach
In this paper we propose a hardware real time operating system (HW-RTOS) solution that makes use of a dedicated hardware in order to replace the standard support provided by the P...
Sathish Chandra, Francesco Regazzoni, Marcello Laj...
DATE
2008
IEEE
91views Hardware» more  DATE 2008»
14 years 2 months ago
Integrating RTL IPs into TLM Designs Through Automatic Transactor Generation
Transaction Level Modeling (TLM) is an emerging design practice for overcoming increasing design complexity. It aims at simplifying the design flow of embedded systems ning and v...
Nicola Bombieri, Nicola Deganello, Franco Fummi