55 search results - page 4 / 11 » Lithography Driven Layout Design |
ISQED
2011
IEEE
13 years 2 months ago
2011
IEEE
The extent to which the 6T SRAM bit cell can be perpetuated through continued scaling is of enormous technological and economic importance. Understanding the growing limitations i...
FPL
2004
Springer
14 years 4 months ago
2004
Springer
Abstract. Layout tools for FPGAs can typically be run in two different modes: non-timing-driven and timing-driven. Non-timing-driven mode produces a solution quickly, without consi...
ICCAD
2006
IEEE
14 years 7 months ago
2006
IEEE
Yield and variability are becoming detractors for successful design in sub-90-nm process technologies. We consider the fundamental lithography and process issues that are driving ...
DAC
2004
ACM
14 years 11 months ago
2004
ACM
Variability of circuit performance is becoming a very important issue for ultra-deep sub-micron technology. Gate length variation has the most direct impact on circuit performance...
ISCAS
2007
IEEE
14 years 5 months ago
2007
IEEE
-- In interconnect-dominated designs, the ability to minimize layout-induced parasitic effects is crucial for rapid design closure. Deep sub-micron effects and ubiquitous interfere...