1631 search results - page 317 / 327 » Load balancing on speed |
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
As memory speeds and bus capacitances continue to rise, external memory bus power will make up an increasing portion of the total system power budget for system-on-a-chip embedded...
CASES
2004
ACM
14 years 1 months ago
2004
ACM
While the dynamic voltage scaling (DVS) techniques are efficient in reducing the dynamic energy consumption for the processor, varying voltage alone becomes less effective for t...
ERLANG
2003
ACM
14 years 26 days ago
2003
ACM
The viability of implementing an in-memory database, Erlang ETS, using a relatively-new data structure, called a Judy array, was studied by comparing the performance of ETS tables...
VRST
2003
ACM
14 years 25 days ago
2003
ACM
We present a novel, generic framework and algorithm for hierarchical collision detection, which allows an application to balance speed and quality of the collision detection. We p...
DATE
1998
IEEE
13 years 12 months ago
1998
IEEE
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...