233 search results - page 39 / 47 » Logic design for low-voltage low-power CMOS circuits |
FPL
2003
Springer
14 years 1 months ago
2003
Springer
We discuss high-performance programmable asynchronous pipeline arrays (PAPAs). These pipeline arrays are coarse-grain field programmable gate arrays (FPGAs) that realize high data...
ISLPED
2010
ACM
13 years 8 months ago
2010
ACM
The unique and unpredictable nature of silicon enables the use of physical unclonable functions (PUFs) for chip identification and authentication. Since the function of PUFs depen...
FPGA
2005
ACM
14 years 2 months ago
2005
ACM
Sublithographic Programmable Logic Arrays can be interconnected and restored using nanoscale wires. Building on a hybrid of bottom-up assembly techniques supported by conventional...
ASPDAC
2008
ACM
13 years 10 months ago
2008
ACM
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
DATE
2010
IEEE
14 years 1 months ago
2010
IEEE
Carbon Nanotube Field-Effect Transistors (CNFETs) can potentially provide significant energy-delay-product benefits compared to silicon CMOS. However, CNFET circuits are subject t...