235 search results - page 32 / 47 » Logical Development of the Cell Ontology |
GLVLSI
1997
IEEE
13 years 11 months ago
1997
IEEE
In a VHDL-based design flow for applicationspecific integrated circuits, VITAL provides a uniform methodology for developing ASIC libraries for signoff simulation. The VITAL Sta...
POPL
2005
ACM
14 years 8 months ago
2005
ACM
A lightweight logical approach to race-free sharing of heap storage between concurrent threads is described, based on the notion of permission to access. Transfer of permission be...
PADL
2011
Springer
12 years 10 months ago
2011
Springer
Abstract. Modern web forms interact with the user in real-time by detecting errors and filling-in implied values, which in terms of automated reasoning amounts to SAT solving and ...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
In this paper we present a power dissipation model considering the charging/discharging of capacitance at the gate output node as well as internal nodes, and capacitance feedthrou...
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
- In this paper, we study the relationship between C4 package resonance effects and logical switching timing correlations, which has not been thoroughly investigated in the past. W...