626 search results - page 124 / 126 » Logical Foundations for Data Integration |
ISLPED
2003
ACM
14 years 2 months ago
2003
ACM
Traditional pulldown comparators that are used to implement associativeaddressing logic in superscalar microprocessors dissipate energy on a mismatch in any bit position in the co...
CF
2006
ACM
14 years 18 days ago
2006
ACM
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
CF
2006
ACM
14 years 18 days ago
2006
ACM
Traditionally, cache coherence in large-scale shared-memory multiprocessors has been ensured by means of a distributed directory structure stored in main memory. In this way, the ...
FCCM
2004
IEEE
14 years 18 days ago
2004
IEEE
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
ICCAD
1997
IEEE
14 years 13 days ago
1997
IEEE
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...