Sciweavers

980 search results - page 153 / 196
» Logical Testing
Sort
View
ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
13 years 6 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen
ICDE
2007
IEEE
103views Database» more  ICDE 2007»
14 years 10 months ago
A Semantic Approach to Discovering Schema Mapping Expressions
In many applications it is important to find a meaningful relationship between the schemas of a source and target database. This relationship is expressed in terms of declarative ...
Alexander Borgida, John Mylopoulos, Renée J...
ICPR
2004
IEEE
14 years 9 months ago
Serialized Unsupervised Classifier for Adaptative Color Image Segmentation: Application to Digitized Ancient Manuscripts
This paper presents an adaptative algorithm for the segmentation of color images suited for document image analysis. The algorithm is based on a serialization of the k-means algor...
Frank Le Bourgeois, Hubert Emptoz, Yann Leydier
DAC
2004
ACM
14 years 9 months ago
Defining coverage views to improve functional coverage analysis
Coverage analysis is used to monitor the quality of the verification process. Reports provided by coverage tools help users identify areas in the design that have not been adequat...
Sigal Asaf, Eitan Marcus, Avi Ziv
DAC
2006
ACM
14 years 9 months ago
A new LP based incremental timing driven placement for high performance designs
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...
Tao Luo, David Newmark, David Z. Pan