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ISSRE
2008
IEEE
14 years 1 months ago
Testing Software Product Lines Using Incremental Test Generation
We present a novel specification-based approach for generating tests for products in a software product line. Given properties of features as first-order logic formulas, our app...
Engin Uzuncaova, Daniel Garcia, Sarfraz Khurshid, ...
DATE
1999
IEEE
76views Hardware» more  DATE 1999»
13 years 11 months ago
Testing the Configurable Interconnect/Logic Interface of SRAM-Based FPGA's
The objective of this paper is to define a minimum number of configurations for testing the configurable modules that interface the global interconnect and the logic cells of SRAM...
Michel Renovell, Jean Michel Portal, Joan Figueras...
ATS
2000
IEEE
149views Hardware» more  ATS 2000»
13 years 12 months ago
Charge sharing fault analysis and testing for CMOS domino logic circuits
Because domino logic design offers smaller area and faster delay than conventional CMOS design, it is very popular in the high-performance processor design. However, domino logic ...
Ching-Hwa Cheng, Wen-Ben Jone, Jinn-Shyan Wang, Sh...
MTDT
2003
IEEE
164views Hardware» more  MTDT 2003»
14 years 22 days ago
Applying Defect-Based Test to Embedded Memories in a COT Model
ct Defect-based testing for digital logic concentrates primarily on methods of test application, including for example at-speed structural tests and IDDQ testing. In contrast, defe...
Robert C. Aitken
PTS
1998
81views Hardware» more  PTS 1998»
13 years 8 months ago
Testing Temporal Logic Properties in Distributed Systems
Based on the notion of event-based behavioral abstraction EBBA we specify properties of object-oriented distributed systems in linear time temporal logic. These properties are the...
Falk Dietrich, Xavier Logean, Shawn Koppenhoefer, ...