1010 search results - page 104 / 202 » Logics for Contravariant Simulations |
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
Ignoring the effect of simultaneous switching for logic gates causes silicon failures for high performance microprocessor designs. The main reason to omit this effect is the run...
DDECS
2009
IEEE
14 years 3 months ago
2009
IEEE
—Self-timed full adder designs based on commercial synchronous resources (standard cells), constructed using a mix of complete delay-insensitive codes adopted for inputs are desc...
ISCAS
2008
IEEE
14 years 2 months ago
2008
IEEE
—A full-custom design of AES SubByte module based on Sense Amplifier Based Logic is proposed in this paper. Power consumption of this design is independent of both value and sequ...
IROS
2007
IEEE
14 years 2 months ago
2007
IEEE
—The objective of self-healing in mobile robot networks is to maintain not only logical topology but also physical one of a network when robots fail. An interaction dynamics mode...
ISQED
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper studies the impact of variability on the noise robustness of logic gates using noise rejection curves (NRCs). NRCs allow noise pulses to be modeled using magnitude-dura...