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DATE
2006
IEEE
141views Hardware» more  DATE 2006»
14 years 2 months ago
Evaluating coverage of error detection logic for soft errors using formal methods
—In this paper we describe a methodology to measure exactly the quality of fault-tolerant designs by combining faultinjection in high level design (HLD) descriptions with a forma...
Udo Krautz, Matthias Pflanz, Christian Jacobi 0002...
CHES
2005
Springer
117views Cryptology» more  CHES 2005»
14 years 1 months ago
DPA Leakage Models for CMOS Logic Circuits
In this paper, we propose new models for directly evaluating DPA leakage from logic information in CMOS circuits. These models are based on the transition probability for each gate...
Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa
ROBOCUP
2001
Springer
111views Robotics» more  ROBOCUP 2001»
14 years 15 days ago
Evolving Fuzzy Logic Controllers for Sony Legged Robots
This paper presents an evolutionary approach to learning a fuzzy logic controller(FLC) employed for reactive behaviour control of Sony legged robots. The learning scheme is divided...
Dongbing Gu, Huosheng Hu
ISMVL
2000
IEEE
79views Hardware» more  ISMVL 2000»
14 years 14 days ago
Novel Resonant-Tunneling Multiple-Threshold Logic Circuit Based on Switching Sequence Detection
We present a novel multiple-threshold circuit using resonant-tunneling diodes (RTDs). The logic operation is based on detecting a switching sequence in the RTD circuit. This schem...
Takao Waho, Kazufumi Hattori, Kouji Honda
ASPDAC
2001
ACM
127views Hardware» more  ASPDAC 2001»
13 years 11 months ago
High-level design for asynchronous logic
Asynchronous, self-timed, logic is often eschewed in digital design because of its ad-hoc methodologies and lack of available design tools. This paper describes a complete High Le...
Ross Smith, Michiel M. Ligthart