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» Logics for Contravariant Simulations
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DATE
2008
IEEE
75views Hardware» more  DATE 2008»
14 years 2 months ago
A low-cost concurrent error detection technique for processor control logic
This paper presents a concurrent error detection technique targeted towards control logic in a processor with emphasis on low area overhead. Rather than detect all modeled transie...
Ramtilak Vemu, Abhijit Jas, Jacob A. Abraham, Srin...
ANSS
2003
IEEE
14 years 1 months ago
Internode: Internal Node Logic Computational Model
In this work, we present a computational behavioral model for logic gates called Internode (Internal Node Logic Computational Model) that considers the functionality of the gate a...
Alejandro Millán, Manuel J. Bellido, Jorge ...
DATE
2010
IEEE
170views Hardware» more  DATE 2010»
14 years 1 months ago
Analytical model for TDDB-based performance degradation in combinational logic
With aggressive gate oxide scaling, latent defects in the gate oxide manifest as traps that, in time, lead to gate oxide breakdown. Progressive gate oxide breakdown, also referred...
Mihir Choudhury, Vikas Chandra, Kartik Mohanram, R...
SECURWARE
2008
IEEE
14 years 2 months ago
Optimal Trust Network Analysis with Subjective Logic
Trust network analysis with subjective logic (TNA-SL) simplifies complex trust graphs into series-parallel graphs by removing the most uncertain paths to obtain a canonical graph...
Audun Jøsang, Touhid Bhuiyan
UCS
2007
Springer
14 years 2 months ago
D-FLER - A Distributed Fuzzy Logic Engine for Rule-Based Wireless Sensor Networks
Abstract. We propose D-FLER, a distributed, general-purpose reasoning engine for WSN. D-FLER uses fuzzy logic for fusing individual and neighborhood observations, in order to produ...
Mihai Marin-Perianu, Paul J. M. Havinga