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IEEEPACT
2006
IEEE
14 years 1 months ago
Testing implementations of transactional memory
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi...
IEEEPACT
2006
IEEE
14 years 1 months ago
Hardware support for spin management in overcommitted virtual machines
Multiprocessor operating systems (OSs) pose several unique and conflicting challenges to System Virtual Machines (System VMs). For example, most existing system VMs resort to gan...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...
LICS
2006
IEEE
14 years 1 months ago
On the Expressiveness of Linearity vs Persistence in the Asychronous Pi-Calculus
We present an expressiveness study of linearity and persistence of processes. We choose the π-calculus, one of the main representatives of process calculi, as a framework to cond...
Catuscia Palamidessi, Vijay A. Saraswat, Frank D. ...
MICRO
2006
IEEE
84views Hardware» more  MICRO 2006»
14 years 1 months ago
Reunion: Complexity-Effective Multicore Redundancy
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...
ISLPED
2006
ACM
83views Hardware» more  ISLPED 2006»
14 years 1 months ago
Considering process variations during system-level power analysis
Process variations will increasingly impact the operational characteristics of integrated circuits in nanoscale semiconductor technologies. Researchers have proposed various desig...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...