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MICRO
2002
IEEE
143views Hardware» more  MICRO 2002»
14 years 1 months ago
Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor
Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the register file, the functio...
Enric Gibert, F. Jesús Sánchez, Anto...
ASPLOS
2008
ACM
13 years 10 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August
MEMOCODE
2006
IEEE
14 years 2 months ago
Latency-insensitive design and central repetitive scheduling
The theory of latency-insensitive design (LID) was recently invented to cope with the time closure problem in otherwise synchronous circuits and programs. The idea is to allow the...
Julien Boucaron, Robert de Simone, Jean-Vivien Mil...
EMSOFT
2009
Springer
14 years 20 days ago
Modular static scheduling of synchronous data-flow networks: an efficient symbolic representation
This paper addresses the question of producing modular sequential imperative code from synchronous data-flow networks. Precisely, given a system with several input and output flow...
Marc Pouzet, Pascal Raymond
CF
2008
ACM
13 years 10 months ago
A distributed evolutionary method to design scheduling policies for volunteer computing
Volunteer Computing (VC) is a paradigm that takes advantage of idle cycles from computing resources donated by volunteers and connected through the Internet to compute large-scale...
Trilce Estrada, Olac Fuentes, Michela Taufer