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EUROMICRO
1998
IEEE
13 years 12 months ago
Data Speculative Multithreaded Architecture
In this paper we present a novel processor microarchitecture that relieves three of the most important bottlenecks of superscalar processors: the serialization imposed by true dep...
Pedro Marcuello, Antonio González
SIGCOMM
1998
ACM
13 years 12 months ago
Error Control Techniques for Interactive Low-Bit Rate Video Transmission over the Internet
A new retransmission-based error control technique is presented that does not incur any additional latency in frame playout times, and hence are suitable for interactive applicati...
Injong Rhee
RTSS
1994
IEEE
13 years 11 months ago
Bounding Worst-Case Instruction Cache Performance
The use of caches poses a difficult tradeoff for architects of real-time systems. While caches provide significant performance advantages, they have also been viewed as inherently...
Robert D. Arnold, Frank Mueller, David B. Whalley,...
ISQED
2010
IEEE
128views Hardware» more  ISQED 2010»
13 years 9 months ago
A novel all-digital fractional-N frequency synthesizer architecture with fast acquisition and low spur
Digital implementation of analog function is becoming attractive in CMOS ICs, given the low supply voltage of ultra-scaled process. The conventional fractional-N frequency synthes...
Jun Zhao, Yong-Bin Kim
ICCS
2007
Springer
13 years 9 months ago
Planet-in-a-Bottle: A Numerical Fluid-Laboratory System
Abstract. Humanity’s understanding of the Earth’s weather and climate depends critically on accurate forecasting and state-estimation technology. It is not clear how to build a...
Chris Hill, Bradley C. Kuszmaul, Charles E. Leiser...