Sciweavers

116 search results - page 17 / 24
» Loop-Carried Code Placement
Sort
View
LCPC
2005
Springer
14 years 3 months ago
Revisiting Graph Coloring Register Allocation: A Study of the Chaitin-Briggs and Callahan-Koblenz Algorithms
Techniques for global register allocation via graph coloring have been extensively studied and widely implemented in compiler frameworks. This paper examines a particular variant â...
Keith D. Cooper, Anshuman Dasgupta, Jason Eckhardt
SECON
2007
IEEE
14 years 4 months ago
INPoD: In-Network Processing over Sensor Networks based on Code Design
—In this paper, we develop a joint Network Coding (NC)-channel coding error-resilient sensor-network approach that performs In-Network Processing based on channel code Design (IN...
Kiran Misra, Shirish S. Karande, Hayder Radha
DATE
2006
IEEE
121views Hardware» more  DATE 2006»
14 years 3 months ago
Analysis of the impact of bus implemented EDCs on on-chip SSN
In this paper we analyze the impact of error detecting codes, implemented on an on-chip bus, on the on-chip simultaneous switching noise (SSN). First, we analyze in detail how SSN...
Daniele Rossi, Carlo Steiner, Cecilia Metra
CODES
2005
IEEE
14 years 3 months ago
Designing real-time H.264 decoders with dataflow architectures
High performance microprocessors are designed with generalpurpose applications in mind. When it comes to embedded applications, these architectures typically perform controlintens...
Youngsoo Kim, Suleyman Sair
SEFM
2006
IEEE
14 years 3 months ago
A PVS Based Framework for Validating Compiler Optimizations
An optimization can be specified as sequential compositions of predefined transformation primitives. For each primitive, we can define soundness conditions which guarantee that th...
Aditya Kanade, Amitabha Sanyal, Uday P. Khedker