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ISCA
2002
IEEE
91views Hardware» more  ISCA 2002»
15 years 11 months ago
Slack: Maximizing Performance Under Technological Constraints
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
Brian A. Fields, Rastislav Bodík, Mark D. H...
HAPTICS
2005
IEEE
15 years 11 months ago
High Fidelity Multi Finger Haptic Display
The Fingertip Haptic Display (FHD) is a five bar mechanism developed at the University of Washington for haptic interaction with the fingertip of the operator. The twodegree-of-...
Rainer Leuschke, Elizabeth K. T. Kurihara, Jesse D...
DAC
2009
ACM
15 years 10 months ago
RegPlace: a high quality open-source placement framework for structured ASICs
Structured ASICs have recently emerged as an exciting alternative to ASIC or FPGA design style as they provide a new trade-off between the high performance of ASIC design and low ...
Ashutosh Chakraborty, Anurag Kumar, David Z. Pan
SDM
2009
SIAM
175views Data Mining» more  SDM 2009»
16 years 3 months ago
Low-Entropy Set Selection.
Most pattern discovery algorithms easily generate very large numbers of patterns, making the results impossible to understand and hard to use. Recently, the problem of instead sel...
Hannes Heikinheimo, Jilles Vreeken, Arno Siebes, H...
MICRO
2009
IEEE
124views Hardware» more  MICRO 2009»
16 years 25 days ago
ZerehCache: armoring cache architectures in high defect density technologies
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...