Sciweavers

1307 search results - page 130 / 262
» Low Power Hardware for a High Performance PDA
Sort
View
ISLPED
2005
ACM
109views Hardware» more  ISLPED 2005»
15 years 11 months ago
Power reduction by varying sampling rate
The rate at which a digital signal processing (DSP) system operates depends on the highest frequency component in the input signal. DSP applications must sample their inputs at a ...
William R. Dieter, Srabosti Datta, Wong Key Kai
FPL
2003
Springer
114views Hardware» more  FPL 2003»
15 years 11 months ago
Power Analysis of FPGAs: How Practical is the Attack?
Recent developments in information technologies made the secure transmission of digital data a critical design point. Large data flows have to be exchanged securely and involve en...
François-Xavier Standaert, Loïc van Ol...
MICRO
2010
IEEE
167views Hardware» more  MICRO 2010»
15 years 4 months ago
Erasing Core Boundaries for Robust and Configurable Performance
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...
ASPDAC
2005
ACM
93views Hardware» more  ASPDAC 2005»
15 years 8 months ago
Power minimization for dynamic PLAs
—Dynamic programmable logic arrays (PLAs) which are built of the NOR–NOR structure, have been very popular in high performance design because of their high-speed and predictabl...
Tzyy-Kuen Tien, Chih-Shen Tsai, Shih-Chieh Chang, ...
ASPDAC
2010
ACM
137views Hardware» more  ASPDAC 2010»
15 years 4 months ago
Energy and performance driven circuit design for emerging phase-change memory
Abstract--Phase-Change Random Access Memory (PRAM) has become one of the most promising emerging memory technologies, due to its attractive features such as high density, fast acce...
Dimin Niu, Yibo Chen, Xiangyu Dong, Yuan Xie