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» Low Power Hardware for a High Performance PDA
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DATE
2007
IEEE
100views Hardware» more  DATE 2007»
15 years 6 months ago
A new pipelined implementation for minimum norm sorting used in square root algorithm for MIMO-VBLAST systems
Multiple Input - Multiple Output (MIMO) wireless technology involves highly complex vectors and matrix computations which are directly related to increased power and area consumpt...
Zahid Khan, Tughrul Arslan, John S. Thompson, Ahme...
DAC
2006
ACM
15 years 10 months ago
IMPRES: integrated monitoring for processor reliability and security
Security and reliability in processor based systems are concerns requiring adroit solutions. Security is often compromised by code injection attacks, jeopardizing even `trusted so...
Roshan G. Ragel, Sri Parameswaran
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
15 years 12 months ago
Optimal module and voltage assignment for low-power
– Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study ...
Deming Chen, Jason Cong, Junjuan Xu
151
Voted
ICCD
2003
IEEE
141views Hardware» more  ICCD 2003»
16 years 3 months ago
Structured ASICs: Opportunities and Challenges
There is currently a huge gap between the two main technologies used to implement custom digital integrated circuit (IC) designs. At one end of the spectrum are field programmable...
Behrooz Zahiri
ISPASS
2008
IEEE
16 years 20 days ago
Dynamic Thermal Management through Task Scheduling
The evolution of microprocessors has been hindered by their increasing power consumption and the heat generation speed on-die. High temperature impairs the processor’s reliabili...
Jun Yang 0002, Xiuyi Zhou, Marek Chrobak, Youtao Z...