1307 search results - page 24 / 262 » Low Power Hardware for a High Performance PDA |
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
- Data in conventional six transistor (6T) static random access memory (SRAM) cells are vulnerable to noise due to the direct access to the data storage nodes through the bit lines...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
When a signal traverses on-chip voltage domains, a level shifter is required. Inverters can handle a high to low voltage shift with minimal leakage. For a low to high voltage leve...
ATS
1997
IEEE
13 years 11 months ago
1997
IEEE
This paper considers the testability implications of low power design methodologies. Low power and high testability are shown to be highly contrasting requirements, and an optimiz...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
Abstract-- Single-ended static random access memory (SESRAM) is well known for their tremendous potential of low active power and leakage dissipations. In this paper, we present a ...
ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...