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ISCAS
2006
IEEE
119views Hardware» more  ISCAS 2006»
14 years 1 months ago
Scheduling and binding for low gate leakage nanoCMOS datapath circuit synthesis
In this paper we present two polynomial time-complexity heuristic algorithms for optimization of gate-oxide leakage (tunneling current) during behavioral synthesis through simulta...
Saraju P. Mohanty, Elias Kougianos, Ramakrishna Ve...
ASAP
2004
IEEE
115views Hardware» more  ASAP 2004»
13 years 11 months ago
A Low-Power Carry Skip Adder with Fast Saturation
In this paper, we present the design of a carry skip adder that achieves low power dissipation and high-performance operation. The carry skip adder's delay and power dissipat...
Michael J. Schulte, Kai Chirca, John Glossner, Hao...
APCCAS
2006
IEEE
304views Hardware» more  APCCAS 2006»
14 years 1 months ago
Low-Power Bus Transform Coding for Multilevel Signals
Abstract— In this paper, we propose a novel extension of BusInvert coding to handle 4-level pulse amplitude modulated (PAM-4) signals. A generalized mathematical model for energy...
Fakhrul Zaman Rokhani, Gerald E. Sobelman
ISLPED
2005
ACM
72views Hardware» more  ISLPED 2005»
14 years 1 months ago
A low power current steering digital to analog converter in 0.18 Micron CMOS
This paper discusses a number of circuit techniques which address the DC and AC distortion performance of a low power current steering Digital-to-Analog Converter design. The desi...
Douglas Mercer
DAC
1997
ACM
13 years 11 months ago
Tools and Methodologies for Low Power Design
-- Designing for low power has become increasingly important in a wide variety of applications, including wireless telephony, mobile computing, high performance computing, and high...
Jerry Frenkil