1307 search results - page 54 / 262 » Low Power Hardware for a High Performance PDA |
AUTOID
2005
IEEE
14 years 1 months ago
2005
IEEE
We present a wireless identification system that employs an optical communications link between an array of uniquely identifiable smart tags and an interrogator flashlight. As the...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
ISCA
1995
IEEE
13 years 11 months ago
1995
IEEE
Recent superscalar processors issue four instructions per cycle. These processors are also powered by highly-parallel superscalar cores. The potential performance can only be expl...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
—In this paper, we propose a high speed adder which is adopted for our reconfigurable architecture called FleXilicon. To support sub-word parallelism, the FleXilicon architecture...
ICMCS
2007
IEEE
14 years 1 months ago
2007
IEEE
Medical imaging has made great technological breakthroughs in multimodal acquisition, visualization, and analysis with many complementary image modalities to non-invasively captur...