Sciweavers

1307 search results - page 64 / 262
» Low Power Hardware for a High Performance PDA
Sort
View
ISCAS
2005
IEEE
155views Hardware» more  ISCAS 2005»
14 years 1 months ago
Hyperblock formation: a power/energy perspective for high performance VLIW architectures
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
ISLPED
2009
ACM
184views Hardware» more  ISLPED 2009»
14 years 2 months ago
Online work maximization under a peak temperature constraint
Increasing power densities and the high cost of low thermal resistance packages and cooling solutions make it impractical to design processors for worst-case temperature scenarios...
Thidapat Chantem, Xiaobo Sharon Hu, Robert P. Dick
ERSA
2004
134views Hardware» more  ERSA 2004»
13 years 9 months ago
A High Performance Application Representation for Reconfigurable Systems
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
Wenrui Gong, Gang Wang, Ryan Kastner
DAC
2007
ACM
14 years 8 months ago
Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors
Three-Dimensional integration provides a simultaneous improvement in wire-related delay and power consumption of microprocessor circuits. Prior work has looked at the performance,...
Kiran Puttaswamy, Gabriel H. Loh
ISLPED
1996
ACM
76views Hardware» more  ISLPED 1996»
13 years 11 months ago
Comparison of high speed voltage-scaled conventional and adiabatic circuits
The power versus frequency performance of a micropipelined conventional CMOS logic family is compared with that of three similarly pipelined energy-recovering logic families. Usin...
David J. Frank