1307 search results - page 77 / 262 » Low Power Hardware for a High Performance PDA |
ISLPED
1995
ACM
13 years 11 months ago
1995
ACM
We argue that the clocked-CMOS (C2MOS) circuit family provides a very high throughput and low power alternative to other existing circuit techniques for the fast developing market...
ISCA
1997
IEEE
13 years 12 months ago
1997
IEEE
In this paper we evaluate the performance of high bandwidth caches that employ multiple ports, multiple cycle hit times, on-chip DRAM, and a line buffer to find the organization t...
SECON
2008
IEEE
14 years 2 months ago
2008
IEEE
—Energy-efficient performance is a central challenge in sensor network deployments, and the radio is a major contributor to overall energy node consumption. Current energyeffic...
VLSID
2006
IEEE
14 years 8 months ago
2006
IEEE
This paper presents the power and performance analysis of a digital, direct sequence ultra-wideband (DS-UWB) receiver operating in the 3 to 4 GHz band. The signal to noise and dis...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...