Sciweavers

26 search results - page 5 / 6
» Low Power Oriented CMOS Circuit Optimization Protocol
Sort
View
GLVLSI
2009
IEEE
167views VLSI» more  GLVLSI 2009»
14 years 2 months ago
Dual-threshold pass-transistor logic design
This paper introduces pass-transistor logic design with dualthreshold voltages. A set of single-rail, fully restored, passtransistor gates are presented. Logic transistors are imp...
Lara D. Oliver, Krishnendu Chakrabarty, Hisham Z. ...
DAC
2011
ACM
12 years 7 months ago
Rethinking memory redundancy: optimal bit cell repair for maximum-information storage
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
Xin Li
ICCAD
2007
IEEE
153views Hardware» more  ICCAD 2007»
14 years 4 months ago
Checking equivalence of quantum circuits and states
Among the post-CMOS technologies currently under investigation, quantum computing (QC) holds a special place. QC offers not only extremely small size and low power, but also expon...
George F. Viamontes, Igor L. Markov, John P. Hayes
ISCAS
2008
IEEE
125views Hardware» more  ISCAS 2008»
14 years 1 months ago
Ultra-low-power UWB for sensor network applications
— Long distance, low data-rate UWB communication for sensor network applications requires a highly energy efficient transceiver combined with circuit and system-level optimizati...
Patrick P. Mercier, Denis C. Daly, Manish Bhardwaj...
ISLPED
2010
ACM
170views Hardware» more  ISLPED 2010»
13 years 7 months ago
Low-power sub-threshold design of secure physical unclonable functions
The unique and unpredictable nature of silicon enables the use of physical unclonable functions (PUFs) for chip identification and authentication. Since the function of PUFs depen...
Lang Lin, Daniel E. Holcomb, Dilip Kumar Krishnapp...