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VLSID
2007
IEEE
104views VLSI» more  VLSID 2007»
14 years 7 months ago
Customization of Register File Banking Architecture for Low Power
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...
Rakesh Nalluri, Rohan Garg, Preeti Ranjan Panda
CDES
2006
240views Hardware» more  CDES 2006»
13 years 9 months ago
Design of Low Power 4-Tap 8-Bit Adiabatic FIR Filter
Abstract-- Digital signal processing (DSP) is used to perform filtering, decimation and down conversion in common communications systems, like in oversampling analog to digital con...
Arun N. Chandorkar, Gurvinder Singh
GLVLSI
2002
IEEE
135views VLSI» more  GLVLSI 2002»
14 years 13 days ago
Low swing dual threshold voltage domino logic
A low swing domino logic technique is proposed to decrease power consumption without sacrificing noise immunity. With the proposed low swing domino logic circuit technique, active...
Volkan Kursun, Eby G. Friedman
VLSID
2005
IEEE
139views VLSI» more  VLSID 2005»
14 years 7 months ago
Variable Input Delay CMOS Logic for Low Power Design
Modern digital circuits consist of logic gates implemented in the complementary metal oxide semiconductor (CMOS) technology. The time taken for a logic gate output to change after...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
ASPDAC
1999
ACM
168views Hardware» more  ASPDAC 1999»
13 years 11 months ago
An Integrated Battery-Hardware Model for Portable Electronics
- We describe an integrated model of the hardware and the battery sub-systems in batterypowered VLSI systems. We demonstrate that, under this model and for a fixed operating voltag...
Massoud Pedram, Chi-Ying Tsui, Qing Wu