3799 search results - page 147 / 760 » Low Power or High Performance |
100
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ISCAS
2006
IEEE
15 years 10 months ago
2006
IEEE
— By implementing an FPGA-based simulator, we investigate the performance of high-rate quasi-cyclic (QC) LDPC codes for the magnetic recording channel at very low sector error ra...
119
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ESSCIRC
2011
14 years 4 months ago
2011
— Within-functional-block fine-grained adaptive dual supply voltage control (FADVC) is proposed to reduce the power of CMOS logic circuits. Both process and design variations wi...
149
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ETFA
2006
IEEE
15 years 10 months ago
2006
IEEE
While being very successful in everyday life, GPSbased localization systems exhibit limited performance under trees, behind walls, and in closed rooms, and sometimes induce costs ...
131
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ISCAS
1999
IEEE
15 years 8 months ago
1999
IEEE
Current mode (ECL) logic has long been the option of choice in those applications requiring logic functions at multigigahertz rates. This trend continues despite the obvious very ...
130
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DSD
2007
IEEE
15 years 11 months ago
2007
IEEE
Programmable routing and logic in field-programmable gate arrays are implemented using nMOS pass transistors. Since the threshold voltage drop across an nMOS device degrades the ...