3799 search results - page 152 / 760 » Low Power or High Performance |
133
Voted
ISLPED
2010
ACM
15 years 4 months ago
2010
ACM
Structured ASICs provide an exciting middle ground between FPGA and ASIC design methodologies. Compared to ASIC, structured ASIC based designs require lower non recurring engineer...
122
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DATE
2009
IEEE
15 years 11 months ago
2009
IEEE
Violations in memory references cause tremendous loss of productivity, catastrophic mission failures, loss of privacy and security, and much more. Software mechanisms to detect me...
146
Voted
TCOM
2011
14 years 11 months ago
2011
—Low-density parity-check (LDPC) codes are gaining interest for high data rate applications in both terrestrial and spatial communications. They can be designed and studied throu...
121
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VTC
2006
IEEE
15 years 10 months ago
2006
IEEE
Abstract - Whenever a DS-CDMA signal (Direct Sequence Code Division Multiple Access) is the sum of several components associated to different spreading codes (e.g., the DS-CDMA sig...
126
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ICCD
2007
IEEE
16 years 1 months ago
2007
IEEE
This paper proposes a new low power cache architecture that utilizes fault tolerance to allow aggressively reduced voltage levels. The fault tolerant overhead circuits consume lit...