Sciweavers

3799 search results - page 172 / 760
» Low Power or High Performance
Sort
View
VTC
2006
IEEE
117views Communications» more  VTC 2006»
15 years 10 months ago
Low Complexity Soft Interference Cancellation for MIMO-Systems
— Iterative equalization has emerged as an efficient means of achieving near-capacity detection performance in multiple-antenna (MIMO) systems. However, many proposed detection ...
Steffen Bittner, Ernesto Zimmermann, Gerhard Fettw...
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
15 years 10 months ago
Interconnect-Aware Coherence Protocols for Chip Multiprocessors
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
Liqun Cheng, Naveen Muralimanohar, Karthik Ramani,...
MICRO
2009
IEEE
99views Hardware» more  MICRO 2009»
15 years 11 months ago
Low-cost router microarchitecture for on-chip networks
On-chip networks are critical to the scaling of future multicore processors. The challenge for on-chip network is to reduce the cost including power consumption and area while pro...
John Kim
CF
2007
ACM
15 years 6 months ago
Computational and storage power optimizations for the O-GEHL branch predictor
In recent years, highly accurate branch predictors have been proposed primarily for high performance processors. Unfortunately such predictors are extremely energy consuming and i...
Kaveh Aasaraai, Amirali Baniasadi, Ehsan Atoofian
DATE
2008
IEEE
182views Hardware» more  DATE 2008»
15 years 11 months ago
A Novel Low Overhead Fault Tolerant Kogge-Stone Adder Using Adaptive Clocking
— As the feature size of transistors gets smaller, fabricating them becomes challenging. Manufacturing process follows various corrective design-for-manufacturing (DFM) steps to ...
Swaroop Ghosh, Patrick Ndai, Kaushik Roy