3799 search results - page 180 / 760 » Low Power or High Performance |
111
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ICCD
2003
IEEE
16 years 1 months ago
2003
IEEE
High-speed I/O circuits, once used only for PHYs, are now widely used for intra-system signaling as well because of their bandwidth, power, area, and cost advantages. This technol...
176
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ISPD
2006
ACM
15 years 10 months ago
2006
ACM
In this paper, we propose more accurate power/ground network circuit model, which consider both via and ground bounce effects to improve the performance estimation accuracy of on-...
120
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VLSI
2010
Springer
14 years 11 months ago
2010
Springer
A novel Capacitor array structure for Successive Approximation Register (SAR) ADC is proposed. This circuit efficiently utilizes charge recycling to achieve high-speed of operation...
141
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AHS
2006
IEEE
15 years 10 months ago
2006
IEEE
This paper describes the architecture of our dynamically reconfigurable Network-on-Chip (NoC) architecture that has been proposed for reconfigurable Multiprocessor system-on-chip ...
144
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DELTA
2006
IEEE
15 years 10 months ago
2006
IEEE
In high speed digital circuits, the inductive effect is more dominant compared to capacitive effect. In particular, as the technology is shrinking, the spacing between interconnec...