3799 search results - page 61 / 760 » Low Power or High Performance |
166
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TCAD
2011
14 years 11 months ago
2011
—Pre-bond testing of 3-D stacked integrated circuits (ICs) involves testing each individual die before bonding. The overall yield of 3-D ICs improves with pre-bond testability be...
136
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ISLPED
1999
ACM
15 years 8 months ago
1999
ACM
A recent trend in low power design has been the employment of reduced precision processing methods for decreasing arithmetic activity and average power dissipation. Such designs c...
145
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NOCS
2008
IEEE
15 years 10 months ago
2008
IEEE
In this paper, we introduce the use of slow-silent virtual channels to reduce the switching power of on-chip networks while keeping the leakage power small. Adding virtual channel...
125
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VLSID
1997
IEEE
15 years 8 months ago
1997
IEEE
I n this paper, we first present a pipelined delayed least mean square (DLMS) adaptive filter architecture whose power dissipation meets a specified budget. This low-power archite...
142
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EUROGP
2001
Springer
15 years 8 months ago
2001
Springer
An evolutionary algorithm is used to design a finite impulse response digital filter with reduced power consumption. The proposed design approach combines genetic optimization an...