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CORR
2010
Springer
196views Education» more  CORR 2010»
15 years 4 months ago
Low Power Reversible Parallel Binary Adder/Subtractor
In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Low Power CMOS, Quantum Computing, Nanotechnology, and Optical Computin...
H. G. Rangaraju, U. Venugopal, K. N. Muralidhara, ...
DAC
2009
ACM
16 years 5 months ago
O-Router:an optical routing framework for low power on-chip silicon nano-photonic integration
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, D...
DAC
2009
ACM
15 years 10 months ago
O-Router: an optical routing framework for low power on-chip silicon nano-photonic integration
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, D...
ISCAS
2002
IEEE
125views Hardware» more  ISCAS 2002»
15 years 9 months ago
Switching activity estimation of finite state machines for low power synthesis
A technique for computing the switching activity of synchronous Finite State Machine (FSM) implementations including the influence of temporal correlation among the next state si...
Mikael Kerttu, Per Lindgren, Mitchell A. Thornton,...
ISCAS
1999
IEEE
116views Hardware» more  ISCAS 1999»
15 years 8 months ago
A coefficient segmentation algorithm for low power implementation of FIR filters
The authors present a multiplication algorithm for low power implementation of digital filters on CMOS based digital signal processing systems. The algorithm decomposes individual...
Ahmet T. Erdogan, Tughrul Arslan