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FPL
2008
Springer
116views Hardware» more  FPL 2008»
15 years 5 months ago
NOC architecture design for multi-cluster chips
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
Henrique C. Freitas, Philippe Olivier Alexandre Na...
CODES
2007
IEEE
15 years 8 months ago
Energy efficient co-scheduling in dynamically reconfigurable systems
Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. Hardware designs employ low power ...
Pao-Ann Hsiung, Pin-Hsien Lu, Chih-Wen Liu
ISLPED
2005
ACM
111views Hardware» more  ISLPED 2005»
15 years 9 months ago
Energy reduction in multiprocessor systems using transactional memory
The emphasis in microprocessor design has shifted from high performance, to a combination of high performance and low power. Until recently, this trend was mostly true for uniproc...
Tali Moreshet, R. Iris Bahar, Maurice Herlihy
IPPS
1998
IEEE
15 years 8 months ago
A Flexible Approach for a Fault-Tolerant Router
: Cluster systems gain more and more importance as a platform for parallel computing. In this area the power of the system is strongly coupled with the performance of the network, ...
Andreas C. Döring, Wolfgang Obelöer, Gun...
ISCAS
2006
IEEE
107views Hardware» more  ISCAS 2006»
15 years 10 months ago
A versatile computation module for adaptable multimedia processors
—This paper describes a low cost, low power, versatile computation module that can be used as a coarse-grain building block in multimedia processors. The module, which has a data...
Yunan Xiang, R. Pettibon, Martin Margala