224 search results - page 35 / 45 » Low power and high performance design challenges in future t... |
MICRO
2006
IEEE
14 years 1 months ago
2006
IEEE
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...
LCTRTS
2010
Springer
13 years 5 months ago
2010
Springer
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...
INTEGRATION
2008
13 years 7 months ago
2008
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
PARELEC
2000
IEEE
13 years 11 months ago
2000
IEEE
Recent advances in high-speed networks, rapid improvements in microprocessor design, and availability of highly performing clustering software implementations enables cost-effecti...
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
Heat removal and power delivery have become two major reliability concerns in 3D stacked IC technology. For thermal problem, two possible solutions exist: thermal-through-silicon-...