224 search results - page 6 / 45 » Low power and high performance design challenges in future t... |
PPL
2008
13 years 7 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
SC
2009
ACM
14 years 2 months ago
2009
ACM
Continuous evolution in process technology brings energyefficiency and reliability challenges, which are harder for memory system designs since chip multiprocessors demand high ba...
ANCS
2009
ACM
13 years 5 months ago
2009
ACM
As communication-centric computing paradigm gathers momentum due to increased wire delays and excess power dissipation with technology scaling, researchers have focused their atte...
ISLPED
2003
ACM
14 years 19 days ago
2003
ACM
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative ...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...